cc  c_mem.c -o c_mem

make command will generate file c_mem.

    cc  c_mem.c

make command will generate file a.out.

all these seems make sense for me. However from manual: https://www.gnu.org/software/make/manual/html_node/Rule-Introduction.html

A target is usually the name of a file that is generated by a program; examples of targets are executable or object files. A target can also be the name of an action to carry out, such as ‘clean’ (see Phony Targets).

A prerequisite is a file that is used as input to create the target. A target often depends on several files.

PHONY: https://stackoverflow.com/questions/2145590/what-is-the-purpose-of-phony-in-a-makefile So I am not sure

    cc  c_mem.c -o c_mem

the :hello and hello: mean?

can I interpret the makefile as

The whole project name alias as hello, in hello for file c_mem.c do the following command

cc  c_mem.c -o c_mem

1 Answer 1


Makefiles are interpreted as follows:

target: <dependencies>
  commands to produce target
  • The colon : always belong to the target.
  • All dependencies will be checked (for file date) when building the target, so all needed dependencies will automatically be updated if needed.
  • When dependencies have been re-built (are more recent than target), execute the commands listed

As stated in the article under the link you supplied:

PHONY targets are not associated with (output) files

So you are always able to build the target, independent of file dates, when needed (eg.: make clean):

.PHONY: clean
   rm -rf build/*

I would suggest to use CMake though, which is a generator for Makefiles, but much more understandable in Syntax. Makefilescan get quite messy.

  • So this command can be explain as for c_mem.c do command: cc c_mem.c -o c_mem?
    – jian
    Jul 13, 2022 at 9:39
  • For target hello look after changes in c_mem.c. If c_mem.c is newer than the targets (that should be c_mem: ... ) then run the associated command cc c_mem.c -o c_mem.
    – gerhard d.
    Jul 13, 2022 at 10:15

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