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I'm currently learning for an exam in operating systems. This includes learning some basics about page tables, which lead me to the question Why using hierarchical page tables? which mentions that access control bits take about one byte for each entry in the page table. Another source mentioned also one byte for one page.

But what information is in access control bits for a hierarchical page table?

tfinley.net mentions:

  • Valid bit
  • Dirty bit
  • Do we have access to read (but why should we ever not have access to read?)
  • write
  • execute

That would be 5 bit. But I don't think the source is good and I still miss 3 bit.

According to Gary Shute it's 4 bit additional information (valid bit, rwx).

Could somebody please tell me what's in the access control bits? Preferably with a source.

I guess this question might depend on the actual system. I'm happy with any system you know this for and have sources.

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This answer is for a IA-32 architecture. I took the information form Intels IA-32 Architectures Software Developer’s Manuals, Page 1751/3044(!):

Table 4-6. Format of a 32-Bit Page-Table Entry that Maps a 4-KByte Page:

  • 0 (P): Present; must be 1 to map a 4-KByte page
  • 1 (R/W): Read/write; if 0, writes may not be allowed to the 4-KByte page referenced by this entry (see Section 4.6)
  • 2 (U/S): User/supervisor; if 0, user-mode accesses are not allowed to the 4-KByte page referenced by this entry (see Section 4.6)
  • 3 (PWT): Page-level write-through; indirectly determines the memory type used to access the 4-KByte page referenced by this entry (see Section 4.9) entry (see Section 4.9)
  • 4 (PCD): Page-level cache disable; indirectly determines the memory type used to access the 4-KByte page referenced by this entry (see Section 4.9)
  • 5 (A): Accessed; indicates whether software has accessed the 4-KByte page referenced by this entry (see Section 4.8)
  • 6 (D): Dirty; indicates whether software has written to the 4-KByte page referenced by this entry (see Section 4.8)
  • 7 (PAT): If the PAT is supported, indirectly determines the memory type used to access the 4-KByte page referenced by this entry (see Section 4.9.2); otherwise, reserved (must be 0)
  • 8 (G): Global; if CR4.PGE = 1, determines whether the translation is global (see Section 4.10); ignored otherwise
  • 11:9: Ignored
  • 31:12: Physical address of the 4-KByte page referenced by this entry

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