In fact you have two targets (
clean). You can call them on the console when you are in the folder by
make all or
make clean. The first target is alwas the default target (
make results in
Indented the recipe is stated. This is the code that gets executed by make to build the target. So the invocation of
make will result in the invocation of
make −C /lib/modules/$(shell uname −r)/build M=$(PWD) modules
Of course the shell expands the
uname command and the
M environment variable. Then
make is invoked in the named folder (
/lib/modules/$(shell uname −r)/build) with the target
modules. What this target (of the subprocess) does is obviously not specified in this file.
This means, that in
/lib/modules/$(shell uname −r)/build there is another
Makefile, that has a
modules target defined. The above listed command builds/calls/issues this
modules target in
/lib/modules/$(shell uname −r)/build/Makefile.
The same holds true for the
clean target. This will issue a subprocess with the
clean target in the named folder.
The idea of the two targets is to have two distinguished features. One (
all) is to build something (your module probably). The other is to clean up your work (
clean) in case the compiling went wrong and you want to remove any non-source files. This interpretation of the targets is however only semantically from the name. It depends upon the implementation of them. You can name them
t3 if you like. However is is much less readable than
The first line appends a string
hello−1.o to the vaiable
obj−m. As the variable is empty before (if not set up by external environmental variables), it is simply set to that value. However, the value is not
exported, thus only locally visible.
So it has no effect on the subprocesses (see this link).
An additional remark:
I was wrong that the
obj-m had no effect. The
Makefile is reread by the kernel's
Makefile and searched for variables beginning with
obj-. These are then used for compiling the required object files. Source: https://stackoverflow.com/a/21140538/882756