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Books on operating systems usually mentions that the page size is decided by the processor architecture, for example Intel x86 supports 4KB page size. I have a perception that when we were installing an operating system on our hardware, the OS had read the page size of 4KB from hardware and logically divided the virtual address space into 4KB size pages and memory into frames respectively.

If my perception is true, from where or from which location in hardware does the operating system read this value of 4KB from the processor? What mechanism does the OS use to determine the page size provided by hardware? Can anybody enlighten me on this? How (On What Basis) Intel decides to keep 4KB page size.

  • Wow that’s a significant edit — “how does Intel decide to keep 4KB page size?” is a rather different matter than “how does the operating system read the page size?” – Stephen Kitt Jan 22 at 14:58
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Operating systems hard code the page size depending on the architecture (and in some cases, build-time kernel configuration). For example, on x86 the basic page size is always 4KiB — this is a property of the CPU architecture; on Linux you’ll see this defined in include/asm/page_types. On 64-bit ARM, the page size can be configured at build-time as 4KiB, 16KiB or 64KiB. Some architectures multiple page sizes at runtime (e.g. huge pages on x86), but all the sizes are known ahead of time and the base size is fixed.

On Linux, the canonical definition of the page size is PAGE_SIZE, and you get it by including asm/page.h, which is architecture-specific (which might pull in other headers, as happens on x86). Elixir provides a handy list of all the PAGE_SIZE definitions.

Most architectures supported by the Linux kernel support 4KiB pages; the exceptions are Alpha, ARC, some Motorola 68k systems, OpenRISC and 64-bit SPARC, which all use 8KiB pages. Many architectures can be configured to use other pages sizes.

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