the kernel maintains a data structure, called a page table, that contains a mapping of
a processes' virtual page addresses to real page addresses in memory.

I read a book with the sentence above, I don't know why it's a processes'? So the kernel
has a single page table which contains mappings for many processes, i.e. kernel didn't store those page tables for all processes separately, but in a single page table?

The book is How Linux Works by Brian Ward, 2nd, page 182, line 4.

It seems like the book has some grammar errors:

  1. table, that should be table that: no error. (thanks for the comment!)
  2. a mapping of a processes' should be a mapping of a process's
  • 2
    “... a data structure, called a page table, that ...” is correct: “that” refers to “a data structure”. Dec 11, 2018 at 20:57
  • @StephenKitt: That makes sense, thank you!
    – Kindred
    Dec 11, 2018 at 21:11
  • Please undelete your this question, I was about to end a good answer to it...
    – peterh
    Dec 26, 2018 at 20:35
  • 1
    @ptr_user7813604 Yeah, it is another nice feature of the SE: voting your posts to close and to down, without any acceptable reason, is perfectly okay. If you complain against it, you might strongly watch your steps, it might be considered as an insult. ;-) You need to understand: it is a System, a collective entity, what we feed with our content. If you give him enough food, it will be nicer to you. But still you need to balance, you need to estimate what is the point what the system yet tolerates - and you need to be also a productive content provider for him. Sometimes you will still lose.
    – peterh
    Dec 26, 2018 at 21:55
  • 1
    @ptr_user7813604 So diplomacy helps a lot, and write many useful, upvoted posts! So little "violations" will be tolerated, but note: it is the personal decision of the mods. I delete the comments.
    – peterh
    Dec 26, 2018 at 21:56

1 Answer 1


It's a bit more complicated than that.

First off, there is only one true page table for any given processor core at a time. This is because it's the hardware that does the actual mapping of virtual addresses to physical addresses (more specifically, the MMU), and the kernel only ever gets involved when the contents of the page table have to change.

In addition, the kernel stores it's own information about the state of the virtual memory mappings for each execution context (process, thread, or kernel thread) separately. These are stored independently of each other and separate from the page tables used by the hardware for address mapping. Whenever the execution context changes (for example, a process makes a system call or an interrupt handler gets woken up to service an interrupt), part of the process of switching the execution context involves flushing the old entries from the hardware page table, and then loading it with the new entries. Depending on the two contexts, this may involve only repopulating a very small number of entries (for example, switching threads of the same userspace process), or it might require reloading the entire table (for example, switching from a user process to an interrupt handler).

  • I don't quite understand your Independent of that, ... and from the hardware page table, could you elaborate more? (especially the both from each other.)
    – Kindred
    Dec 11, 2018 at 20:15
  • I've updated the answer to hopefully clarify things better. Sorry that it was a bit confusing. Dec 11, 2018 at 20:22
  • 1
    In the last sentence, reloading the entire table used to be rare (or at least, it could have been made rare, since the kernel mapping didn’t change), and switching from a user process to the kernel didn’t involve touching the page table; all that changed with KAISER/KPTI. Dec 11, 2018 at 20:56
  • When you said "Whenever the execution context changes (for example, a process makes a system call or an interrupt handler gets woken up to service an interrupt), part of the process of switching the execution context...", I think if switching happens between two processes what is being flushed is the memory in the MMU?
    – Gang Fang
    Nov 28, 2019 at 22:55
  • @GangFang It's part of the MMU, specifically the Translation Lookaside Buffer (TLB), which is in most processors the only part of the hardware paging implementation that matters for this. Some CPU's do things a bit weird though, and don't use a TLB and have literal hardware page tables. Nov 28, 2019 at 23:13

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