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Back in the days of x86 (32 bit) (before sysenter/sysexit/syscall etc..) INT 0x80 was used to invoke kernel actions from a userland process. According to https://stackoverflow.com/questions/1817577/what-does-int-0x80-mean-in-assembly-code DOS used INT 0x21 for the same purpose. The same source, among others, states that x86 CPUs would understand up to 256 soft interrupts (0x00 - 0xff). Even if some of them are blocked by special functionality an OS should be able to use mor than just one soft interrupt. But no OS seems to do so. Only one is used? What is the reason for this design decision?

  • You just mentioned an operating system that does use more than one soft interrupt for its API. It's not on-topic for this WWW site, but such an operating system does exist. – JdeBP Jan 2 '18 at 19:56
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There are not enough soft interrupts for all system calls, so a parameter identifying the system call is needed. There is no reason to number the system calls in two dimensions. All software interrupts are alike anyway, there aren't some that are more suited for some particular type of system calls.

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Unix for which Linux was based on does not specifically make use of interrupts in terms of its design.

On the x86 architecture calling an interrupt causes execution to be in ring 0. While in reality a syscall is actually using the existing context and only saves the thread state with the first register (EAX) set to the syscall. The other registers are the other operands of the syscall. You can see why this is quite portable.

Maybe 2-3 mnemonics would be saved by skipping this step. Having all syscalls referenced as interrupts would make the code non-portable and if more than 256 were needed you'd have to use a system like this anyway. A soft interrupt on x86 is shared with hardware interrupt addresses on the Interrupt Vector Table (IVT). So the idea of using them all up especially on certain hardware configurations is entirely possible.

Further making multiple soft interrupts increases the chances of cache misses as roughly similar interrupt handler code would have to be loaded from different areas of memory.

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