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I have two questions about virtual address layout of kernel on x86 and x64 system.

As far as I know, x86 uses the splited memory layout that is highmem and lowmem.

If my understanding is correct, the only difference between highmem and lowmem is whether it has 1:1 virtual to physical address mapping or not.

Also, it seems that lowmem contains code and data frequently accessed by the kernel program and highmem contains the page tables or userlevel program data which is not frequently accessed.

However, I cannot understand the reason the x86 kernel splits the virtual address spaces and locates the frequently accessed data and code to lowmem. What is the advantage of it? It seems that regardless of the location of the kernel memory, page table walking should be invoked to get virtual to physical mappings. If it is correct, it seems that there is no advantage of the highmem and lowmem.

Here, my first question is, if lowmem uses the 1:1 mappings (i.e., physical address + constant(0x80000000) => kernel virtual address) why the MMU spends its clock to walk the page table to know the virtual to physical mappings. If possible, we can modify the MMU logic to make it only minus magic constant from the virtual address to get a physical address if it is located in lowmem region. or is there any other reasons to locate frequently accessed data and code into the lowmem? And why only the lowmem uses the 1:1 mappings...?

My second question is "does lowmem and highmem memory split mechanism deployed in the x64 linux system also?"

Thanks in advance

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Highmem and lowmem are related to the Physical Address Extension on x86 processors. This mechanism enables the processor to address 64GB of memory, instead of the conventional 4GB. However, because the instruction set is unchanged, and the registers and pointers are still 32 bit long, the virtual address space is still limited to 4GB. Machine instructions always use virtual addresses, not physical addresses.

The consequence of this is that "highmem" cannot be directly addressed at all until it is mapped into the addressable region. This is why only lowmem uses the 1:1 mapping; mapping to highmem is not possible.

Your next question was: why can't the MMU logic be simplified to skip page tables and do a simple subtraction to get the physical address? The MMU is implemented in hardware, and it is designed to use page tables (and the TLB) to do its job. "Huge" pages exist, though, which skip one level in the page tables, making the page size 4MB instead of 4kB on the x86.

Your last question: is the memory split in lowmem and highmem on the x64 architecture too? No. The PAE mechanism is a bit of a kludge to extend the lifetime of the x86. The x64 with its much larger address spaces (both physical and virtual) does not need it.

  • Aha thanks a lot :) I have further questions... 1. As far as I know, in x86 4G bytes memory can be allocated as virtual addresses, and kernel has 1 Gb memory. This 1gb memory is split as highmem and lowmem, and highmem is described as 128mb memory region in kernel space. If it is already located in the kernel memory space what do you mean by it should be located in kernel address space to access them? – JaeHyuk Lee Apr 8 '17 at 3:24
  • From your answer, my understanding is... Because the register can only locates the 32 bit memory, even though the extended feature of the processor supports further memory accesses, highmem which is 128mb in linux kernel is used to map another physical memory to kernel address space to access it right? So... it triggers further overhead to map the unmapped physical address to kernel address space and that is the reason infrequently used memory is allocated to highmem right? Then what about the x64? Does it uses the 1:1 mappings for all kernel virtual addresses? Thanks a lot – JaeHyuk Lee Apr 8 '17 at 3:32
  • My answer was perhaps not as precise as it should have been. The 1:1 mapping (with the 0xc0000000 offset) is used for lowmem is used for the first 896 MB of physical RAM. The remaining upper 128 MB of the address space is used as a window into the rest of the physical RAM that is not mapped in lowmem. This RAM is dynamically mapped into the kernel address space as needed. None of this extra work is needed for x64, which follows the original pre-PAE x86 model, but with larger addresses, of course. – Johan Myréen Apr 8 '17 at 8:09
  • I see. So if the x64 bit system wants to access more than 64bit address space in future, then it may revisit the previous highmem region for dynamic memory mappings right? And the reason that kernel locates the frequently accessed data to lowmem is that it doesnt require additional overhead to map it right? And we don't have additional memory mapping overhead in x64 system until now right? Thanks a lot :) – JaeHyuk Lee Apr 8 '17 at 8:56
  • Hope it is the last question haha.. so if the x64 kernel uses 1:1 mappings for entire kernel memory space, I still cannot understand your points about MMU translation process. If the kernel can let MMU knows the offset between the physical and virtual address mappings, it would be much faster though... and as far as I know the virtual to physical address mapping is handled by the memory scramble function of memory controller. Then it cannot have the 1:1 mappings to my knowledge... I am still confused .. sorry – JaeHyuk Lee Apr 8 '17 at 9:05

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