I wonder why 'Makefile' demands dependency line in spite of a command line already has list of file. For example,
hello : main.o hello.o
gcc -o main.o hello.o
The gcc command already contains main.o, hello.o. Writing dependency line looks inefficient.
make
somewhat: it's primary advantage isn't just to blindly run a set of commands (shell scripts are perfectly good at that), but to work out which commands need to be run. It can't do that without dependencies.