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While debugging some PCI issues in my computer, I came across PCI BAR assignment errors for BARs 13,14,15, and 7. My understanding was that there are only 6 BARs in the PCI specification, numbered 0 through 5. These are reduced to only 3 when using 64-bit BARS. There is also a ROM BAR, numbered 6.

So my question is: what are these BARs with higher numbers? I don't understand how they fit in with the PCI specification.

0
/*
*  For PCI devices, the region numbers are assigned this way:
*/
enum {
                /* #0-5: standard PCI resources */
                PCI_STD_RESOURCES,
                PCI_STD_RESOURCE_END = 5,   // BAR 0 – BAR5

                /* #6: expansion ROM resource */
                PCI_ROM_RESOURCE,

                /* device specific resources */
#ifdef CONFIG_PCI_IOV
                PCI_IOV_RESOURCES,    //   <--- #7 
                PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, //   7+6  -1
#endif

                /* resources assigned to buses behind the bridge */
#define PCI_BRIDGE_RESOURCE_NUM 4

                PCI_BRIDGE_RESOURCES, < // <--- #13
                PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +           
                                                                  PCI_BRIDGE_RESOURCE_NUM - 1,

                /* total resources associated with a PCI device */
                PCI_NUM_RESOURCES,

                /* preserve this for compatibility */
                DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
};

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