2

I have a directory structure like this:

`-- dev
    |-- example-object
    |   |-- example-object.tex
    |   `-- example-template
    |       |-- example-template.tex
    |       `-- instances
    |           `-- example-instance.tex
    `-- example-object2
        |-- example-object2.tex
        `-- example-template2
            |-- example-template2.tex
            `-- instances
                `-- example-instance2.tex

I'd like to have a directory with only these files:

`-- src
    |-- xcv.example-object.tex
    |-- xcv.example-object.example-template.tex
    |-- xcv.example-object.example-template.example-instance.tex
    |-- xcv.example-object2.tex
    |-- xcv.example-object2.example-template2.tex
    `-- xcv.example-object2.example-template2.example-instance2.tex

This bash script does what I want, but other than copy/pasting it into a Makefile, I can't figure out how to use Make's functionality to do the same:

mkdir -p src/
dest=$(pwd)/src

for object in $(find dev ! -path dev -type d -maxdepth 1); do
    oname=$(basename "${object}")
    echo cp "${oname}.tex" "${dest}"/xcv."${oname}".tex
    for template in $(find "${object}" ! -path "${object}" -type d -maxdepth 1); do
        tname=$(basename "${template}")
        echo cp "${tname}.tex" "${dest}"/xcv."${oname}"."${tname}".tex
        for instance in $(find "${template}"/instances -type f); do
            iname=$(basename "${instance}")
            echo cp "${iname}.tex" "${dest}"/xcv."${oname}"."${tname}"."${iname}"
        done
    done
done
1

You can't write multi-line bash scripts in Makefile. Every line is executed in new shell so you will lose context. Also the variables are evaluated as make variables. Rather store your code in separate bash script and run that from Makefile. It is not worth to abuse your bash script nor make to do that job.

If you really want to have it in your Makefile, you need to make it one-line and escape the dollars in variables.

Example that will not work:

$ cat Makefile
test: 
    VAR="YES";
    echo "x${VAR}";
$ make
VAR="YES";
echo "x";
x 

Escaped:

$ cat Makefile
test: 
    VAR="YES"; \
    echo "x$${VAR}";
jakuje@E6430:/tmp/test$ make
VAR="YES"; \
echo "x${VAR}";
xYES
  • The \ syntax is exactly what I was referring to with copy/paste :-) I'm looking for a solution with foreach and the like. – Sean Allred Jan 16 '16 at 19:12
  • so then I really didn't get your question. Or you expect I will rewrite your code to work in Makefile? – Jakuje Jan 16 '16 at 19:15
  • I'm continuing to try to figure out the Makefile approach and will edit-in my best attempt when I feel it's as far as I can go, but yes. Even the basic idea of mapping functionality onto files/folders in a directory would basically answer the question. – Sean Allred Jan 16 '16 at 19:17

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