I'm trying to include some env vars into a Makefile. The env file looks like:


Note there's no leading export to each env var. If I add the leading export and just include the env file in the Makefile, everything works as it should. But I need to keep the env vars sans leading export. That prevents me from just using include envfile in the Makefile.

I've also tried doing something like this:

sed '/^#/!s/^/export /' envfile > $(BUILDDIR)/env
include $(BUILDDIR)/env

But doing that cause make to throw an error because the env file isn't there for including.

  • 1
    Welcome to Unix&Linux. Please state the question you have clearly. What is it exactly that you're trying to accomplish? – darnir Oct 10 '15 at 16:40
  • 1
    I'm trying to include a file that contains environment variable pairs into a Makefile so that they are available to the environment in which make is running. – Michael Irwin Oct 10 '15 at 17:06

If you are using gnu make, what should work is to include the envfile file, then export the list of vars got from the same file:

include envfile
export $(shell sed 's/=.*//' envfile)

|improve this answer|||||
  • 8
    Thanks for this answer, it's brilliant! Although my version even works without the export $(shell... line. I just need the include line. – Dawngerpony Jan 15 '17 at 12:45

I had a similar problem and landed on this thread. Another possible solution is to just do the make export command without any arguments:

include .env

This will export all make variables as environment variables. This behavior may or may not match all use cases, but it worked for me and didn't involve any shell scripting wizardry.

|improve this answer|||||

Preserves pre existing ENV vars

export $(shell [ ! -n "$(ENVFILE)" ] || cat $(ENVFILE) | grep -v \
    --perl-regexp '^('$$(env | sed 's/=.*//'g | tr '\n' '|')')\=')

    echo $$FOO

To run

make ENVFILE=envfile test # bar

export FOO=foo
make ENVFILE=envfile test # foo
|improve this answer|||||

if your filename is .makerc then you can include it to Makefile as simple as this:

include .makerc

I prefer to add - sign before include, to suppress any warnings.

|improve this answer|||||

Here is an elegant solution that does not import Make vars, but does set any environment exports for shell subprocesses. Personally I prefer to keep my profiles dynamic scripts.

export BASH_ENV=tools/sh/env.sh

There are some gotchas. Unfortunately ENV does not work, I think it should (but that's an issue with Bash, not Make). Also it really requires another line, because Make's default shell interpreter is /bin/sh.

BASH_ENV := tools/sh/env.sh
SHELL := /usr/bin/bash

On the up-side this also allows to include shell functions in Makefile scripts, but only for the recipe scripts. I don't know how other shells besides Bash fare. And there is a bit more going on. I put some testfile up as GIST.

There are plenty of complicated shell scripts imaginable. I like this Q/A best for the simple answers.

|improve this answer|||||

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.