How to echo makefile variable through Make's $(shell ...)

Question

I have a GNU makefile. The makefile has a few tests (around line 65 from the linked file):

UNAME = uname

MACHINE ?= $(shell $(UNAME) -m)
SYSTEM ?= $(shell $(UNAME) -s)

IS_X86 = $(shell echo $MACHINE | $(EGREP) -c "i.86|x86|i86|amd64")
IS_X86_64 = $(shell echo $MACHINE | $(EGREP) -c "_64|d64")

The makefile is failing to set IS_X86 and IS_X86_64 properly under MinGW and its sh shell. When I add the following after the block of tests:

$(info MACHINE: $(MACHINE))
$(info SYSTEM: $(SYSTEM))
$(info IS_X86: $(IS_X86))
$(info IS_X86_64: $(IS_X86_64))

And I get in return:

$ make
MACHINE: i686
SYSTEM: MINGW32_NT-6.1
IS_X86: 0
IS_X86_64: 0

I'm presuming MinGW can match i686 to i.86, so I'm guessing there's something wrong with the echo command or the variable under MinGW.

I also tried the following with no joy:

$(shell echo $(MACHINE) ...)
$(shell echo $((MACHINE)) ...)

I even tried to force the variable expansion before the tests:

MACHINE := $(MACHINE)

Finally, I tried using a temporary with no joy:

MTEXT ?= $(shell $(UNAME) -m)
MACHINE := $(MTEXT)

The tests work fine under the BSDs, Linux, OS X and Solaris. It even works under Cygwin.

What is the trick to using echo under MinGW to echo a makefile variable?

Answer 1

It looks like you are using a weird shell in your mingw environment - and not bash. Or a weird version of egrep.

You can work around this via replacing those egrep shell calls with GNU make conditionals, e.g.:

ifeq (,$(filter %686 %x86 %i86 %amd64,$(MACHINE)))
  IS_X86 = 0
else
  IS_X86 = 1
endif

Alternatively, you could create something based on $(findstring ...) or other GNU make text functions.

Besides working around your current problem, using such GNU make language feature is also more efficient than forking left and right via $(shell).