make for linux kernel module

I have recently started learning kernel module programming using the book The Linux Kernel Module Programming Guide and I dont understand how does this make work

obj-m += hello-1.o
all:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean


note that I understand the basics of makefile but this one seems to be complex one at least shouldn't make clean be rm hello-1.ko ?

• Start with man make. You will see -C dir, --directory=dir Change to directory dir before reading the makefiles or doing anything else... – user1794469 Jul 13 '15 at 1:23
• whats is next to be done after the -C – oddcoder Jul 13 '15 at 18:03
• What do you mean? the dir that comes after the -C is where make should execute. That is make will change to /lib/modules/$(shell uname -r)/build before trying to make modules or clean. – user1794469 Jul 13 '15 at 18:29 • yes I understood that what I didn't understand is what is M why does the makefile is make instead of direct compiling ? sorry It may seam obvious but I still didn't get it – oddcoder Jul 13 '15 at 20:13 1 Answer Here is a breakdown of what is going on in this makefile: There is a list of objects someplace, add "hello-1.o" to the list. obj-m += hello-1.o  Create a target called all that has no requirements. The recipe to make all is to change in to the build directory in the directory that is named based on the current kernel release this system is running (which is in the modules directory under /lib). While we're at it save a variable that will contain the present working directory that we call this make from. Now find a make file in that directory we just changed into and build the target modules all: make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules  This one is almost the same and is left as an exercise for the reader: clean: make -C /lib/modules/$(shell uname -r)/build M=\$(PWD) clean


The reason the clean isn't just a rm is because the kernel has a lot of independent parts that all work together. Writing one monolithic makefile would be painful at best but really unmaintainable. Therefore each logical part of the build directory has it's own makefile that can be called from the coordinating makefile. Makefiles can get pretty hairy so it's bestto keep them focused and maintainable.