I have a tool with 5 python scripts say A.py, B.py, C.py, D.py and E.py. I have to run this program in Linux. A.py is the one program I run which imports other files and uses them. For running A.py, I use the command

$ python A.py

Until now the input and output paths are hardcoded in A.py. Now I am supposed to write a makefile with all the file structure and dependencies. This makefile should also include the command for executing python scrip A.py. The required input and output paths has to be understood when make makefile command is invoked and the tool should start running. How to do this?


The makefile should be something like this holding all these details.

INPUT_PATH = list of all input paths
FILES = list of .c files located in the above specified paths
OUTPUT_PATH = output path where generated file has to be stored
command to execute python scrip:
   A.py inputpath+filename outputpath

so whenever there a new input .c files, they will be added to the list in makefile. Any sample makefile of this kind that you could suggest?


In python you get the commandline parameters from sys.argv so instead of

#!/usr/bin/env python
base_dir = /hard/coded/path

you do:

#!/usr/bin/env python
import sys
base_dir = sys.argv[1]

(putting in checks might be appropriate). If you explicitly start the program with python, you can leave out the first line, but it won't hurt to be there in case you make A.py executable, you will need it.

In your makefile you now can specify:

        python A.py /hard/coded/path

(make sure you have a Tabbefore python, not 8 spaces.

And then you can run make (no need to do make makefile unless you have a Makefile or with Gnu make a GNUmakefile in the same directory)


I strongly suggest, you read a basic Makefile tutorial.

What you basically want, is putting your paths in macros, which in those instances work similar to variables.

for instance DIR=/your/path.

Be aware, that directives look like this:


if your directive is named default or all it'll get executed without explicitly calling the directive from command line. So you don't have to invoke with make directive, just make.

Now, the space in front of the command, must be a tab character. I also advice naming your makefile Makefile (capital 'M'), so you can invoke it, just by typing make.

now, your script must be able to receive a command line argument (in this case the directories), and you'd invoke something like:

        python A.py $(DIR)

With DIR being your macro with the proper directory name.

Also, I advice reading the relevant bits of the GNU Make manual

There is of course quite a bit more to Makefiles than what is described in this scope. Since makefiles are quite an integral part of developing on Linux, I strongly advice getting to grips with the basics, at least!

  • can u please go through the edits in the question? The paths are specified under a variable and the list of file names under another variable. How to check whether the file is in any of the paths listed above? @polemon – AnushaReddy Jun 15 '15 at 6:53
  • @AnushaReddy Are you sure you want this as Makefile? it seems to me almost as if it would make more sense implementing this as a shellscript... – polemon Jun 15 '15 at 18:49
  • unix.stackexchange.com/questions/209757/…. kindly give me a solution for this. I gave a sample example of my makefile. @polemon – AnushaReddy Jun 16 '15 at 4:48
  • @AnushaReddy I'll do that right when I get back home. In the mean time, I suggest you take a look at gnu.org/software/make/manual/html_node/Foreach-Function.html because what you want to do, is slightly above the scope of a single Makefile. Normally, you put one Makefile into each subdir that needs making, and invoke that one from the root Makefile. – polemon Jun 17 '15 at 14:20
  • I put my code in a particular location and a makefile in that location will have paths indicating where my input files are. These paths will be specified relative to the location of my code. Then why do I need multiple makefiles for this? – AnushaReddy Jun 19 '15 at 5:32

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