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It became really annoying and the resolution is bad so I decided to make my EDID and pass that to the Kernel. (I am creating EDID for S20A300B and samsung says in its page the best RES for this product is 1600*900)
I created a 1600*900.S file and tried to fill it with the info I got from cvt 1600*900 and also DPI calculator=91.79.
but there are some values I can't find the answer to.

CLOCK XY_RATIO XY_RATIO_16_9 ESTABLISHED_TIMINGS_BITS 0x00 HSYNC_POL VSYNC_POL CRC

The 1600x900.S file is:

        /*
       1920x1080.S: EDID data set for standard 1920x1080 60 Hz monitor

       Copyright (C) 2012 Carsten Emde <C.Emde@osadl.org>

    */

    /* EDID */
    define VERSION 1
    define REVISION 3

    /* Display */
    /* EDID */
#define VERSION 1
#define REVISION 3

/* Display */
#define CLOCK 60000 /* kHz */
#define XPIX 1600
#define YPIX 900
#define XY_RATIO XY_RATIO_16_9
#define XBLANK 160
#define YBLANK 26
#define XOFFSET 48
#define XPULSE 32
#define YOFFSET (63+3)
#define YPULSE (63+5)
#define DPI 91.79
#define VFREQ 60 /* Hz */
#define TIMING_NAME "Linux FHD"
#define ESTABLISHED_TIMINGS_BITS 0x00 /* none */
#define HSYNC_POL 1
#define VSYNC_POL 1
#define CRC 0x05

#include "edid.S"
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Taking these one at a time:

CLOCK is the pixel clock. It's given on the first line of output from cvt as pclk. Multiply that value by 1000 to go from MHz to kHz.

XY_RATIO is the aspect ratio. 1600x900 corresponds to 16:9, so it's default value, XY_RATIO_16_9, is correct. You can find the possible values near the beginning of the edid.S file.

ESTABLISHED_TIMING_BITS I believe is used to specify one of a few predefined modes. I think it's safe to leave as 0x00 for all cases.

HSYNC_POL and VSYNC_POL are the horizontal and vertical sync polarities. They are also part of the cvt modeline output. The end of the second line contains something like +hsync -vsync, which would correspond to HSYNC_POL 1 and VSYNC_POL 0. Some monitors may only support certain polarities so you may need to check your monitor's documentation and use those values instead of cvt's.

CRC is the checksum of the EDID data. The value is best found by first entering a dummy value and compiling the source, creating an edid binary. Then pass that binary to edid-decode, which near the end will print the dummy CRC value followed by what it should be. You then replace the dummy value in the source code with the value suggested by edid-decode and compile again.

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