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What you could do is download Ubuntu .iso on your computer, then use SFTP (FTP via SSH) to upload .iso file to your server. On your server you can mount the .iso file like this: mkdir /mnt/ubuntu_iso mount -o loop /path/to/file.iso /mnt/ubuntu_iso Now edit /etc/apt/sources.list file and comment out everything that is not cd-rom related. Then run ...


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Two problems: Your makefile is set up to use the Solaris C compiler's options, but you're using gcc. You don't say how your makefile was generated, but replacing CFLAGS with something more appropriate will help. If you used a configure script to generate your makefile then I'm a bit confused, as doing CC=gcc ./configure should be enough to do the right ...


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You should check out the Arch Linux ARM Rollback Machine. There's the gcc 4.7.2 packages there.


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If you only want to compile programs that run on their own on a processor (“bare metal” system), then all that matters is to have a compiler that produces instructions for that particular processor. “For ARM” is almost enough information, but not quite: you would also need to specify the version of the instruction set. Most ARM processors today are based on ...


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That depends on the exact make(1) you have got, and the makefile being used. For example, GNU make helpfully assumes a set of default rules and macros. I.e., the macro CC gives the name of the C compiler, CXX the C++ one; CFLAGS are flags for CC and CXXFLAGS for CXX. It also defines a slew of default rules, i.e., to create a foo.o from foo.c by calling ...


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[Edit] From the GNU make man page: If no -f option is present, make will look for the makefiles GNUmakefile, makefile, and Makefile, in that order. Passing arguments are only possible if you have a variable for example CFLAGS defined in your Makefile: CC=gcc CFLAGS=-g -O -Wall -Werror all: foo foo: foo.o $(CC) $(CFLAGS) $< Here you are ...


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You want the CFLAGS environment variable. For example: $ export CFLAGS='-ggdb3' $ make test cc -ggdb3 test.c -o test


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Generally when you type make test if you're missing a Makefile the make tool will attempt to use a vanilla compile command. Example Say we have the following test.c: $ cat test.c #include <stdio.h> int main() { printf( "I am alive! Beware.\n" ); return 0; } Without a Makefile when we run make test we'd get the following behavior: $ make ...



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