An easier way to do this than shell scripting, once you get the hang of it, is to use make, which you have probably seen reference to before.
A dead simple makefile might look like this:
g++ myproject.cpp -o myproject
make chooses the first target if one is not specified, since there is only one in this case, it will do what you see there. The target is the label before the colon (myproject); after the colon are prerequisite targets. If those targets are not listed, they are assumed to be files. In this case, if myproject.cpp has not changed since the output of the myproject target did (the "myproject" binary), make does nothing. If it has, it recompiles.
The use value of make becomes clearer as things get more complicated:
flags = -Wall -g -O2
myproject: myproject.h myproject.cpp somepart.o
g++ $(flags) somepart.o myproject.cpp -o myproject
somepart.o: somepart.h somepart.cpp
g++ $(flags) -c somepart.cpp -o somepart.o
The .h files are prereqs since if you change one, you want the parts requiring it recompiled. So now you can do
make somepart.o to just compile the object, or you can do
make which will use the first target (myproject) which requires an up-to-date "somepart.o", so if that is not available, it will make all that too.
Doing that with a bash script is not so easy, which is probably why
make came to be. Unfortunately, "getting the hang of it" can take a bit of time. l0b0 already linked to this:
Beware first that make is whitespace sensitive especially with regard to using actual tabs and not spaces.