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I set a variable TEMPP='-I ../dir1 -I ../dir2'

then I run

gcc -M $TEMPP somefile.c

It seems not to include ../dir1 and ../dir2 in the search list of the include file, and if there is a space at the beginning of the variable, like

TEMPP=' -I ../dir1 -I ../dir2'

it reports an error:

gcc: -I ../common1 -I ../encrypt: No such file or directory

so it seems the variable was treated as a file.

Maybe it will let me separate the directory to avoid this promblem, but those included dirs are generated by another command, and the amount is not constant.

So how can I let a variable in a command be treated as literal seem like a manual input in command line, not an integral string or a file name?

OK...I find this situation only happened in the zsh, but in bash it works well... may be in zsh the expansion of variable is special.

So if anyone can tell me how can this work well in zsh I will appreciate, or I can only do this in bash.

share|improve this question
Your example, as written, should work fine. Please provide the actual command you are running. – Mikel Oct 24 '11 at 16:30
up vote 1 down vote accepted

In zsh, unlike other Bourne-style shells, the results of a variable substitution are not split into words that are interpreted as wildcard patterns. So in zsh, if you write

a='hello *.txt'
echo $a

then you see hello *.txt, unlike other shells where you'll see something like hello bar.txt foo.txt.

You can turn on word splitting for one expansion with $=TEMPP. You can turn on word splitting for all expansions with setopt sh_word_split or emulate sh.

You should stick these commands in a makefile and let a real Bourne-style shell (whatever is installed as /bin/sh) run them. Keep zsh for interactive use and your own scripts.

share|improve this answer
Thanks, your answer is solve my zsh problem, and yes, in makefile there is no that problem, in the beginning I use makefile to test these command, it works well, but for some reason I need to run these command in command line, then I run it in zsh and found it works differ from makefile. Thanks for your answer and advice. – wind Oct 25 '11 at 2:21

I believe you're trying to control whether white space in "$TEMPP" is interpreted or not. (Note, this is not a GCC problem, it is your shell that is parsing the command line.)

Here is what bash does:

$ F="foo bar baz"
$ for f in $F; do echo $f; done

And here is what zsh does:

$ F="foo bar baz"
$ for f in $F; do echo $f; done
foo bar baz

You need to get zsh to interpret the whitespace. There may be a graceful way to do this in zsh (I don't know, but if you re-title and tag your question, you might get more useful answers). This should work around the problem, but is a bit of a heavy hammer for this problem:

eval gcc -M $TEMPP somefile.c
share|improve this answer
Yes, you are right, at first I don't know the problem is because of zsh, so the title is this, and then I find this work well in bash and I make a supplements in the end, but I did not consider about the title.And thanks for you solution about eval, it works. – wind Oct 24 '11 at 8:48

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